The development of DC-DC power converter chips for laser radar drive power and AC-DC power converter chips for AC Municipal Electric represents significant advancements in the field of power electronics. These technologies play a crucial role in various applications, from smartphone sensors to smart home devices, by efficiently converting and managing electrical power.

For laser radar systems, the ability to provide stable and efficient power to single-optical avalanche diode (SPAD) modules is essential for accurate and reliable operation. However, meeting the stringent power requirements of SPAD modules, including high voltage, low ripples, and fast transient response, poses significant challenges for existing power converter designs. Therefore, further research into novel architectures and optimization techniques is needed to improve the performance, efficiency, and power density of DC-DC converters for laser radar drive power applications.

Similarly, in the area of smart homes and building applications, the demand for compact, energy-efficient power converters is rapidly increasing. However, there is still room for improvement and optimization in this area, with ongoing efforts to unlock the full potential of capacitive power conversion and meet the ever-growing demands for energy-efficient solutions in smart living environments.

Based on this, two works conducted by Associate Professor Junmin Jiang’s research group from the Department of Electronic and Electrical Engineering (EEE) at the Southern University of Science and Technology (SUSTech) were chosen for presentation at the IEEE International Solid-State Circuit Conference (ISSCC 2024), a global forum for the presentation of advances in solid-state circuits and systems-on-a-chip technology.

At the same time, Gang Liu, a graduate student of the Department of EEE, was awarded the Solid-State Circuits Society Student Travel Grant Award at the conference.

Power chip for responding quickly to Sigma-type LiDAR Driver

In their first work, Professor Jiang’s group proposed a DC-DC power converter chip for laser radar drive power. With the application of the laser radar system in smartphones, vehicle radars, and three-dimensional imaging, the SPAD module for receiving laser signals SPAD modules puts forward higher requirements for DC bias power.

In a typical application scenario, the power module needs to increase the low voltage to about 16V SPAD bias voltage and maintain low ripples, fast transient response, high efficiency, and small volume. It is difficult for the existing DC-DC power converter in academia and industry to meet the requirements of SPAD on power module power density, transient response speed, and voltage adjustment accuracy.

As shown in Figure 1, the researchers proposed a system architecture of a boost-voltage Sigma converter. The power converter was divided into two voltage domains, which were responsible for the power transformation from the two converter circuits. High-voltage domain converters are mainly responsible for power transmission to achieve high efficiency and energy density. The low-voltage side is regulated by a high-gain and high-bandwidth linear regulator (LDO) to ensure the circuit’s voltage adjustment accuracy and response speed. The architecture of the SC SIGMA converter can combine the advantages of the two power converters to meet the needs of the SPAD bias power supply.

Figure 1. The proposed system architecture and advantage of the SC SIGMA boost converter

Figure 2 displays the designed chip, where the Sigma-type boost converter proposed by the research team implements the 16V output under 5V input. It also shows the output voltage error of 44µV/MA, a peak efficiency of 94% under the 3.6W output power, a transient response time as low as 180ns, and a power density of 152mW/mm³.

Figure 2. Photos of Chip and PCB test board

This work, entitled “A 3.6W 16V-Output 180ns-Response-Time 94%-Efficiency SC Sigma Converter with Output Impedance Compensation and Ripple Mitigation for LiDAR Driver Applications”, was presented at ISSCC 2024.

Research Assistant Professor Chen Hu and graduate student Xinran Huang, both from the Department of EEE at SUSTech, are the co-first authors of this paper. Associate Professor Junmin Jiang is the corresponding author, and SUSTech is the first communication unit.

Figure 3. Research Assistant Professor Chen Hu presenting his report at the ISSCC 2024 conference

High-efficiency, high-energy density non-isolation AC-DC converter chip

In recent years, smart homes and buildings have needed a large number of offline devices, such as smart door locks, Internet of Things nodes, smoke detectors, etc. These devices usually obtain the power supply from the AC grid, which requires the power converter to directly convert the general AC voltage of 85-264V to a DC battery voltage of 3 to 4.2V. Non-isolation AC-DC converters have the characteristics of small volume, low cost, and easy deployment. Based on this huge demand, the research team proposed an AC-DC power converter chip for AC Municipal Electric.

Traditional non-isolated AC-DC converters use high-voltage linear or inductive switching stabilizers, and there are disadvantages such as low efficiency or huge system volume. Capacitive AC-DC power converters have a higher integration, volume, and overall efficiency. However, they still face challenges such as high static power consumption, limited output power, and low energy density.

Figure 4. Diagram of principle and application for AC-DC converter

In this second work, the chip proposes a technology for static power consumption reduction, output power enhancement, and output voltage pattern wave reduction. The design can reduce static current and power consumption (Figure 5). Compared with traditional solutions, the chip reduces about 50% of the static power consumption and achieves an ultra-low static power consumption of 5.11mW; it increases the output power by about 75%, achieving an output power of 1.05W. The energy density reaches 477 mW/cm3, which is the highest value of energy density in similar products.

Figure 5. Photos of Chip and PCB test board

This work, entitled “An 85-264Vac to 3-4.2Vdc 1.05W Capacitive Power Converter with Idle Power Reduction and 4-Phase 1/10X SC Converter Achieving 5.11mW Quiescent Power and 78.2% Peak Efficiency”, was also presented at ISSCC 2024.

Gang Liu is the first author of this paper. Associate Professor Junmin Jiang and Professor Xun Liu from the Chinese University of Hong Kong (Shenzhen) are the co-corresponding authors, and SUSTech is the first communication unit.

Figure 6. Gang Liu presenting his report at the ISSCC 2024 conference

These works were supported by the National Natural Science Foundation of China (NSFC), Department of Science and Technology of Guangdong Province, Science, Technology and Innovation Commission of Shenzhen Municipality, SUSTech EEE-AXS Tech Joint Laboratory, High-Level Talent of Shenzhen, and the Start-Up Fund of SUSTech.

About ISSCC conference

The IEEE ISSCC is the highest-level meeting of integrated circuit design in the world and corporate circles. It is considered the “World Olympic Conference” in the field of integrated circuit design. It is also the first place for publishing top solid-state circuit technology in various periods around the world. ISSCC attracts more than 3,000 participants from industrial and academic circles around the world.

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