The lineup of accepted papers for presentation at the 2024 IEEE Symposium on VLSI Technology and Circuits (VLSI Symposium) was recently announced, with three papers selected from the School of Microelectronics (SME) at the Southern University of Science and Technology (SUSTech).

Associate Professor Quan PAN’s research group presents two of these papers. The first, authored by Ph.D. student Xuxu CHENG, is entitled “A 2×56 Gb/s Single-Ended Orthogonal PAM-7 Transceiver with Encoder-Based Channel-Independent Crosstalk Cancellation in 28-nm CMOS”. The second, authored by Ph.D. student Liping ZHONG, is entitled “A 2×112 Gb/s 0.34 pJ/b/lane Single-Ended PAM4 Receiver with Multi-Order Crosstalk Cancellation and Signal Reutilization Technique in 28-nm CMOS”.

Quan PAN serves as the corresponding author, with SME standing as the sole affiliated unit. These works were supported by the National Natural Science Foundation of China (NSFC) and the National Key R&D Program.

Additionally, doctoral student Yingjie ZHU, under the guidance of Assistant Professor Longyang LIN, will present his paper, entitled “A 0.72nW, 0.006mm2 32kHz Crystal Oscillator with Adaptive Sub-Harmonic Pulse Injection from -40°C to 125°C in 22nm FDSOI”. SME is the first affiliated unit, and this work was supported by the Guangdong Basic and Applied Basic Research Fund.

The VLSI Symposium stands at the top in the field of integrated circuits and semiconductors, attracting the publication of top research results from the international semiconductor industry and academia every year.

Jointly organized by the IEEE Solid-State Circuits Society, IEEE Electron Devices Society, and the Japan Society of Applied Physics, the symposium alternates between sites in the US and Japan annually. It serves as a premier platform for industry leaders, scholars, and government representatives to share and discuss cutting-edge advancements in integrated circuits and semiconductor technologies.